This invention relates to a method of manufacturing a semiconductor IC device and more particularly, to a method of manufacturing a bipolar semiconductor device suitable for an emitter coupled logic/current mode logic (hereafter ECL/CML) circuit.
Where high speed operations are required, ECL/CML type bipolar semiconductor devices are widely used. Prior methods of manufacturing bipolar semiconductor devices are disclosed in many United State patents, including U.S. Pat. Nos. 4,735,912, 4,783,422, 4,866,000, 4,873,200 and 4,946,798.
For example, U.S. Pat. No. 4,783,422 discloses a process for fabricating a bipolar transistor having a reduced junction capacitance between a base and an emitter. In this process, however, it is impossible to minimize the size (width) of the active region photolithographically because the base and the emitter are formed in the active region photolithographically.